The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2026

Filed:

Jun. 22, 2022
Applicants:

Iucf-hyu (Industry-university Cooperation Foundation Hanyang University), Seoul, KR;

Research & Business Foundation Sungkyunkwan University, Suwon-si, KR;

Inventors:

Chang Hwan Choi, Seoul, KR;

Yoonmyung Lee, Suwon-si, KR;

Yu Rim Jeon, Seoul, KR;

Dong UK Seo, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/065 (2023.01); G11C 11/54 (2006.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
G06N 3/065 (2023.01); G11C 11/54 (2013.01); H10B 63/84 (2023.02); H10N 70/841 (2023.02); H10N 70/8833 (2023.02); H10W 20/435 (2026.01);
Abstract

Disclosed is a technology of independently connecting a plurality of neuromorphic elements three-dimensionally laminated on a Complementary Metal-Oxide Semiconductor (CMOS) wafer through an interconnection layer and selectively driving and testing the plural neuromorphic elements with pulses generated and transmitted from the CMOS wafer. More particularly, the 3D neuromorphic system implemented on a Complementary Metal-Oxide Semiconductor (CMOS) wafer, the 3D neuromorphic system including: an element array including a plurality of neuromorphic elements respectively and independently connected to a plurality of interconnection layers formed on the Complementary Metal-Oxide Semiconductor (CMOS) wafer; a synaptic pulse generator configured to generate at least one synaptic pulse to generate synaptic characteristics in the plural neuromorphic elements; and a controller configured to generate a control signal for controlling generation of the at least one synaptic pulse and to control the at least one synaptic pulse generated in the plural neuromorphic elements to sequentially applied.


Find Patent Forward Citations

Choi, Chang. (2026). 3d neuromorphic system and operating method thereof (U.S. Patent No. 12769994). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12769994

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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