The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2026

Filed:

Oct. 07, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Srinivas Patil, Austin, TX (US);

Qing Yun Li, San Diego, CA (US);

Nir Maor, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01);
Abstract

Aspects of the disclosure are directed to a built-in self test (BIST) mode save and restore operation. In accordance with one aspect, the disclosure includes executing a save directive for an initial state of a digital logic system in an operational mode; executing a built-in self test (BIST) sequence on the digital logic system in a built-in self test (BIST) mode; and executing a restore directive in the digital logic system in the operational mode.


Find Patent Forward Citations

Patil, Srinivas. (2026). System state save and restore mechanism using ram and scan chains (U.S. Patent No. 12768887). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12768887

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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