The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2026
Filed:
Jun. 05, 2024
Nvidia Corporation, Santa Clara, CA (US);
Celing Liu, Morgan Hill, CA (US);
Gunaseelan Ponnuvel, San Jose, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
Testing chip or board packages for thermal failure can be conducted at various stages of the package's life cycle. Conventional testing can detect a thermal failure of the package, though conventional testing does not detect at which specific thermal layer a failure has occurred. By applying an R deviation percentage to the measured thermal parameters received from a testing unit, a specific breakdown of each thermal interface layer can be analyzed. Each thermal interface layer has an associated gold value which is a known good value of thermal energy at a specific time interval. The gold value can be compared to the timing results calculated from the measured thermal parameters. This comparison can then identify which thermal interface layers, if any, are causing the thermal failure of the package. The thermal interface layer can then be repaired or the manufacturing process can be modified to eliminate the failure.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile