The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Mar. 27, 2024
Applicant:

Institute of Microelectronics, Chinese Academy of Sciences, Beijing, CN;

Inventors:

Xianyu Chen, Beijing, CN;

Huilong Zhu, Poughkeepsie, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/069 (2026.01); H10W 20/023 (2026.01);
Abstract

Provided are a self-aligned nanometer through-silicon-via structure and a method of preparing the same. According to the preset range and positions of the first and second trenches, the second preset pattern is formed, and then the first initial blind hole is formed by etching based on the second preset pattern, so that the position of the nanometer through-silicon-via is determined. The depth of the buried power rail may be determined by etching the silicon substrate with the first preset depth, and the depth of the self-aligned nanometer through-silicon-via may be determined by etching the silicon substrate with the second preset depth or thinning the fourth structure from a side of the silicon substrate.


Find Patent Forward Citations

Chen, Xianyu. (2026). Self-aligned nanometer through-silicon-via structure and method of preparing the same (U.S. Patent No. 12765343). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12765343

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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