The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Oct. 11, 2024
Applicant:

Yuan-ju Chao, Cupertino, CA (US);

Inventor:

Yuan-Ju Chao, Cupertino, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); H03M 1/46 (2006.01);
U.S. Cl.
CPC ...
H03M 1/129 (2013.01); H03M 1/46 (2013.01);
Abstract

The present invention relates to a Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) capable of handling large input voltage ranges beyond the supply voltage (VDD) through integrated voltage attenuation. By introducing a series capacitor (Cx) between the input and the Digital-to-Analog Converter (DAC) capacitors, the SARADC achieves input voltage attenuation without the need for external resistor dividers. The proposed configuration supports both single-ended and differential modes, allowing the SARADC to process wide-ranging input voltages while minimizing power consumption, circuit complexity, and silicon area.


Find Patent Forward Citations

Chao, Yuan-Ju. (2026). Apparatus and method for wide input range successive approximation register (sar) analog-to-digital converter (adc) with integrated voltage attenuation (U.S. Patent No. 12763788). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12763788

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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