Memory refresh rate based throttling scheme implementation

Abstract

Various embodiments include methods for controlling memory utilization to accommodate changes in memory accessibility due to memory refreshes include controlling bandwidth of at least one processor based on a refresh rate of a memory. Some embodiments may include receiving the refresh rate of the memory at a memory controller, and determining whether the refresh rate of the memory violates a high or low memory refresh rate threshold, sending an instruction configured to reduce or restore the bandwidth of the at least one processor in response to the determination. In some embodiments the methods may be performed by a quality of service manager, which may be part of a memory controller.