The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Aug. 01, 2022
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Sagar Uttarwar, Bangalore, IN;

Disha Gundecha, Pune, IN;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/061 (2013.01); G06F 3/064 (2013.01); G06F 3/0652 (2013.01); G06F 3/0679 (2013.01);
Abstract

Storage devices contain a memory array that comprises memory devices for storing data. These memory devices can be arranged in a configuration of blocks that group a number of memory devices together. Often, blocks are the smallest unit that can be erased, however various storage devices can divide blocks into sub-blocks which can operate as unique blocks themselves. These sub-blocks can be seen as regular blocks to the storage device or host computer. However, the time needed to erase these increased number of operational sub-blocks decreases overall performance as more erase time is needed. Devices and methods described herein decrease overall erase times within a sub-block memory array by checking the status of related sub-blocks before processing an erase request for a particular sub-block. Each of the related sub-blocks can be erased alongside the particular sub-block if the status of the related sub-blocks provides for erasure without losing host data.


Find Patent Forward Citations

Uttarwar, Sagar. (2026). Efficient sub-block erasing (U.S. Patent No. 12761792). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12761792

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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