The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2026
Filed:
Apr. 03, 2024
Applicant:
Semiconductor Components Industries, Llc, Scottsdale, AZ (US);
Inventors:
Nam Khong Then, Seremban, MY;
Hui Min Ler, Seremban, MY;
Phillip Celaya, Gilbert, AZ (US);
Chee Hiong Chew, Seremban, MY;
Assignee:
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/00 (2026.01); H10W 70/40 (2026.01); H10W 72/60 (2026.01); H10W 72/90 (2026.01); H10W 74/00 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/043 (2026.01); H10W 70/421 (2026.01); H10W 90/00 (2026.01); H10W 90/811 (2026.01); H10W 72/631 (2026.01); H10W 72/641 (2026.01); H10W 72/921 (2026.01); H10W 72/923 (2026.01); H10W 72/9415 (2026.01); H10W 74/00 (2026.01); H10W 90/754 (2026.01);
Abstract
Implementations of a leadframe for a semiconductor package may include a half-etched gate lead directly coupled to a gate tie bar; a half-etched source lead directly coupled to a source tie bar; and a die flag directly coupled to at least two die flag tie bars. The gate tie bar and the source tie bar may be configured to enable electroplating of a flank of the half-etched gate lead and the half-etched source lead.