Three-layered stacked image sensor and method of manufacturing the same

Abstract

The inventive concepts provide a three-layered stacked image sensor in which misalignment between a through electrode and a pad is reduced and coupling noise between adjacent pads is reduced, and methods of manufacturing the same. The three-layered stacked image sensor includes an upper chip including pixels arranged in a two-dimensional array structure and a first wiring layer, each of pixels including a photodiode, a transfer gate, and a floating diffusion region, an intermediate chip including a source follower gate, a select gate, and a reset gate corresponding to each of pixels, a first silicon layer, and a second wiring layer, and a lower chip including an image sensor processor, a third wiring layer, and a second silicon layer, a cross-section of an upper portion of a through electrode extending from the second wiring layer through the first silicon layer having an inverted trapezoidal structure.