The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Oct. 26, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyun Geun Choi, Suwon-si, KR;

Ki Seok Lee, Suwon-si, KR;

Keun Nam Kim, Suwon-si, KR;

Seok Han Park, Suwon-si, KR;

Bo Won Yoo, Suwon-si, KR;

Jin Woo Han, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 80/00 (2026.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H10B 10/00 (2023.01); H10B 12/00 (2023.01); H10W 72/90 (2026.01); H10W 90/00 (2026.01); H10W 80/00 (2026.01); H10W 90/20 (2026.01);
U.S. Cl.
CPC ...
H10B 80/00 (2023.02); H10B 12/33 (2023.02); H10B 12/482 (2023.02); H10B 12/485 (2023.02); H10B 12/488 (2023.02); H10B 12/50 (2023.02); H10W 72/90 (2026.01); H10W 90/00 (2026.01); H10W 80/312 (2026.01); H10W 80/327 (2026.01); H10W 90/297 (2026.01); H10W 90/792 (2026.01);
Abstract

A semiconductor memory device including an active pattern on a first substrate and comprising a first and second surfaces opposite to each other in a first direction, a data storage pattern between the active pattern and the first substrate and connected to a first surface of the active pattern, a bit line on the active pattern, connected to a second surface of the active pattern, and extending in a second direction, a word line on a sidewall of the active pattern, a second substrate, a peripheral gate structure on a first surface of the second substrate, a first connection wiring structure on the first surface of the second substrate and connected to the peripheral gate structure and bit line, a second connection wiring structure on a second surface of the second substrate and a through via penetrating the second substrate and connecting the first and second connection wiring structures.


Find Patent Forward Citations

Choi, Hyun. (2026). Semiconductor memory device (U.S. Patent No. 12757413). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12757413

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…