The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2026
Filed:
Nov. 20, 2024
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Tamal Das, Bengaluru, IN;
Gopinath Rayasam, Bengaluru, IN;
Sanjeeb Kumar Ghosh, Bengaluru, IN;
Saikat Hazra, Bengaluru, IN;
Assignee:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/49 (2006.01); H03L 7/093 (2006.01);
U.S. Cl.
CPC ...
H04L 25/4921 (2013.01); H03L 7/093 (2013.01);
Abstract
Embodiments herein disclose a phase control circuit for a high-speed ADC clock receiver in a PAM4 receiver comprises of, a plurality of Current-Mode Logic (CML) IQ dividers, a plurality of phase interpolators, and a detector circuit, wherein the detector circuit determines phase relation between plurality of clock signals from the plurality of CML IQ dividers and control inputs of the plurality of phase interpolators in a clock data recovery loop based on the determined phase relation.