The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Nov. 29, 2023
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Chih-Jen Chang, Union City, CA (US);

Manasi Deval, Redmond, WA (US);

Parthasarathy Sarangam, Portland, OR (US);

Ravi Tangirala, San Jose, CA (US);

Kiran Ananda Patil, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Implementations of architectures for network processing using a fixed-function logic per-op component close-coupled with programmable logic and software are provided. One aspect provides an integrated circuit device for network processing, the device comprising a composable processing pipeline that includes a programmable per-op component and a fixed-function logic per-op component that is close-coupled with programmable logic and software. The device further comprises a compute complex component comprising processing circuitry implementing the software for controlling the programmable per-op component and the fixed-function logic per-op component, wherein for a first processing pipeline, the processing circuitry is configured to perform a first function using the programmable per-op component, and for a second processing pipeline, the processing circuitry is configured to perform a second function using the fixed-function logic per-op component.


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