Memory device and in-memory computing method for binarized neural network

Abstract

A memory device and an in-memory computing method are provided. The memory device is, for example, a 3D NAND flash memory and provides a storage media with high-performance and high-capacity. In the memory device, an input parser provides initial address information and initial layer activation data. A readout data sensor and comparator reads initial data corresponding to the initial address information from a memory array, and compares the initial layer activation data with a plurality of weight data in the initial data bit by bit respectively to generate a plurality of first comparative data. An error bit detector analyzes the first comparative data to generate a plurality of first analysis data. An operation circuit uses an activation function to operate each first analysis data and a corresponding second analysis data to provide intermediate layer activation data to the input parser.