The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Jul. 30, 2024
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Young-Deuk Jeon, Daejeon, KR;

Yi-Gyeong Kim, Daejeon, KR;

Kyung Hwan Park, Daejeon, KR;

Sujin Park, Daejeon, KR;

Min-Hyung Cho, Daejeon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01S 7/32 (2006.01); G01S 7/292 (2006.01); G01S 13/02 (2006.01); G01S 13/16 (2006.01);
U.S. Cl.
CPC ...
G01S 7/32 (2013.01); G01S 13/16 (2013.01); G01S 7/2926 (2013.01); G01S 13/0209 (2013.01);
Abstract

Disclosed is a receiver of a radar device, which includes a sampling circuit that receives a reflected pulse signal having a first period reflected from a detection target and samples the reflected pulse signal as a first received signal in response to a clock signal having a second period equal to the first period, an integration circuit that, in response to the clock signal, generates an analog integration signal based on the first received signal and a control signal, a comparison circuit that, in response to the clock signal, adjusts a count value and the control signal based on a result of comparing the analog integration signal with a reference signal and outputs the control signal to the integration circuit, and an ADC circuit that converts the analog integration signal into a digital integration signal.


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