The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

Mar. 03, 2023
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Hiroaki Ashidate, Mie, JP;

Tomoyuki Takeishi, Yokkaichi, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/10 (2023.01); G11C 16/04 (2006.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); H10D 88/00 (2026.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
H10W 20/435 (2026.01); G11C 16/0483 (2013.01); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H10D 88/00 (2025.01); H10D 88/101 (2025.01);
Abstract

A semiconductor storage device includes a first layer including a first surface and a second surface located opposite to the first surface. The first layer includes a first memory cell array and a first wire layer, the first memory cell array being provided between the first surface and the second surface and including a plurality of first memory cells, and the first wire layer facing the first surface and being electrically connected to the first memory cells. A second layer includes a third surface and a fourth surface located opposite to the third surface. The second layer includes a second memory cell array provided between the third surface and the fourth surface to be electrically connected to the first wire layer and including a plurality of second memory cells. The first layer and the second layer are joined together on the first surface and the third surface.


Find Patent Forward Citations

Ashidate, Hiroaki. (2026). Semiconductor storage device and manufacturing method thereof (U.S. Patent No. 12751278). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12751278

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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