The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

Aug. 22, 2022
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Brent A. Anderson, Jericho, VT (US);

Hemanth Jagannathan, Niskayuna, NY (US);

Junli Wang, Slingerlands, NY (US);

Albert M. Chu, Nashua, NH (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/90 (2025.01);
U.S. Cl.
CPC ...
H10D 84/907 (2025.01); H10D 84/966 (2025.01);
Abstract

An approach forming semiconductor structure composed of a first plurality of vertical transport field-effect transistors in a lower semiconductor layer and a second plurality of vertical transport field-effect transistors in an upper semiconductor layer. The second plurality of vertical transport field-effect transistors is horizontally offset from the first plurality of vertical transport field-effect transistors by a horizontal distance that is one-half of a contacted gate pitch between adjacent vertical transport field-effect transistors in the same semiconductor layer.


Find Patent Forward Citations

Anderson, Brent. (2026). Staggered pitch stacked vertical transport field-effect transistors (U.S. Patent No. 12751082). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12751082

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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