The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

Feb. 08, 2023
Applicants:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Toshiba Electronic Devices & Storage Corporation, Tokyo, JP;

Inventors:

Masatsugu Nagai, Nomi Ishikawa, JP;

Kazuyuki Sato, Nonoichi Ishikawa, JP;

Shingo Sato, Kanazawa Ishikawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/60 (2025.01); H10D 30/01 (2025.01); H10D 30/63 (2025.01); H10D 62/83 (2025.01); H10P 14/40 (2026.01); H10P 32/10 (2026.01); H10P 32/14 (2026.01); H10P 50/28 (2026.01); H10P 95/90 (2026.01);
U.S. Cl.
CPC ...
H10D 62/60 (2025.01); H10D 30/025 (2025.01); H10D 30/63 (2025.01); H10D 62/83 (2025.01); H10P 14/412 (2026.01); H10P 32/1406 (2026.01); H10P 32/171 (2026.01); H10P 50/283 (2026.01); H10P 95/90 (2026.01);
Abstract

A semiconductor device of embodiments includes: a first electrode; a second electrode; a semiconductor layer provided between the first electrode and the second electrode, having a first face and a second face, and containing silicon; a first semiconductor region of n-type; a second semiconductor region of p-type disposed the first semiconductor region and the first face; a third semiconductor region of n-type between the second semiconductor region and the first face; a gate electrode facing the second semiconductor region; and a metal silicide layer between the first electrode and the second semiconductor region and between the first electrode and the third semiconductor region, including a top surface, a first bottom surface in contact with the third semiconductor region, and containing gold or a platinum group element. The n-type impurity concentration in the third semiconductor region monotonically decreases from the first bottom surface toward the second electrode.


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