The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2026
Filed:
Sep. 20, 2022
Applicant:
Sharp Kabushiki Kaisha, Sakai City, JP;
Inventors:
Huifa Lin, Sakai City, JP;
Shoichi Suzuki, Sakai City, JP;
Daiichiro Nakashima, Sakai City, JP;
Toshizo Nogami, Sakai City, JP;
Wataru Ouchi, Sakai City, JP;
Tomoki Yoshimura, Sakai City, JP;
Takahisa Fukui, Sakai City, JP;
Ryota Morimoto, Sakai City, JP;
Assignee:
SHAP KABUSHIKI KAISHA, Sakai City, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04W 72/231 (2023.01); H04B 7/06 (2006.01); H04W 72/1268 (2023.01); H04W 74/0833 (2024.01);
U.S. Cl.
CPC ...
H04W 72/231 (2023.01); H04B 7/06968 (2023.05); H04W 72/1268 (2013.01); H04W 74/0833 (2013.01);
Abstract
Terminal device receives a SS/PBCH block, a MIB, and a PDCCH. The MIB includes a first MIB payload bit and a second MIB payload bit. The first MIB payload bit is used for indication of a candidate SS/PBCH block index corresponding to the SS/PBCH block A Q' value is indicated only by the second MIB payload bit. The Q′ value is used for quasi co-location assumption among SS/PBCH blocks.