The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

Aug. 14, 2024
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Jong Woo Kim, Icheon-si, KR;

Young Cheol Shin, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/24 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/24 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/3459 (2013.01);
Abstract

Provided herein is a memory device related to precharging a bit line and a method of operating the memory device. The memory device including a plurality of memory cells each connected to any one of a plurality of word lines, the any one of the plurality of word lines being a selected word line, and programmed to any one of a plurality of program states, a row decoder configured to apply a program voltage or a verify voltage to the selected word line, and a plurality of page buffers connected to the plurality of memory cells through a plurality of bit lines and configured to store precharge data used to determine a precharge voltage of a target bit line connected to a verify target memory cell among the plurality of bit lines while the program voltage is applied to the selected word line.


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