The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

Apr. 24, 2024
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Chengdu, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Zhenglong Yan, Beijing, CN;

Yanyang Shang, Beijing, CN;

Yipeng Chen, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3275 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3275 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0297 (2013.01); G09G 2330/021 (2013.01);
Abstract

A display panel, comprising: a substrate (), a plurality of sub-pixels (PX) and a plurality of data lines (DL) located in a display area (AA), and a multiplexing circuit () located in a first frame area (B). The plurality of data lines (DL) are connected to the plurality of sub-pixels (PX). The multiplexing circuit () comprises a plurality of multiplexing units (). At least one multiplexing unit () comprises a plurality of multiplexing transistors. The multiplexing transistors of the plurality of multiplexing units () are arranged in a plurality of rows and columns, one row of multiplexing transistors comprises a plurality of multiplexing transistors arranged in a first direction (X), and one column of multiplexing transistors comprises a plurality of multiplexing transistors arranged in a second direction (Y). The first direction (X) intersects with the second direction (Y).


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