The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2026

Filed:

Aug. 22, 2023
Applicants:

Denso Corporation, Kariya-city, JP;

Toyota Jidosha Kabushiki Kaisha, Toyota, JP;

Mirise Technologies Corporation, Nisshin, JP;

Inventor:

Fumihito Tachibana, Nisshin, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/27 (2025.01); H10D 62/832 (2025.01); H10D 12/00 (2025.01); H10D 12/01 (2025.01);
U.S. Cl.
CPC ...
H10D 64/513 (2025.01); H10D 62/8325 (2025.01); H10D 12/038 (2025.01); H10D 12/481 (2025.01);
Abstract

A semiconductor device includes a semiconductor substrate having a trench adjacent to an upper surface, a gate insulating film inside the trench, a gate electrode on the gate insulating film inside the trench, and an interlayer insulating film covering the gate electrode inside the trench. The semiconductor substrate has a connection surface that connects between the upper surface of the semiconductor substrate and a side surface of the trench and is located below the upper surface of the semiconductor substrate. An upper surface of the gate insulating film is located below the connection surface. An upper surface of the interlayer insulating film is located below the upper surface of the gate insulating film. A metal film is disposed to cover the upper surface of the semiconductor substrate, the connection surface, the upper surface of the gate insulating film, and the upper surface of the interlayer insulating film.


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