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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12745391 B1

PDFFull Text
Date of Patent:
Sep. 22, 2026

Filed:

Nov. 09, 2020

Memory device and manufacturing method thereof

Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Hiromi Sawai, Atsugi, JP;

Tsutomu Murakawa, Isehara, JP;

Hitoshi Kunitake, Isehara, JP;

Assignee:

SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Kanagawa-ken, JP;

Attorneys:

NIXON PEABODY LLP

Jeffrey L. Costellia

Primary Examiner:

Dale E Page

Assistant Examiner:

Patrick undefined Cullen

Int. Cl.
CPC ...
H10B 43/27 (2023.01); H10B 41/27 (2023.01); H10W 20/20 (2026.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H10B 41/27 (2023.02); H10W 20/20 (2026.01);
Abstract

A highly reliable memory device is provided. In a method for manufacturing a memory device that includes a first insulator, a first conductor including a first opening over the first insulator, a second insulator including a second opening over the first conductor, a second conductor including a third opening over the second insulator, a third insulator over the second conductor, and a semiconductor provided in the first opening to the third opening, the first insulator is formed, the first conductor is formed over the first insulator, the second insulator is formed over the first conductor, a fourth insulator is formed over the second insulator, the third insulator is formed over the fourth insulator, the third opening is formed in the fourth insulator, the second opening is formed in the second insulator, the first opening is formed in the first conductor, the semiconductor is formed in the first opening to the third opening, the fourth insulator is removed, and the second conductor is formed between the second insulator and the third insulator.

Find Patent Forward Citations

Sawai, Hiromi. (2026). Memory device and manufacturing method thereof (U.S. Patent No. 12745391). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12745391

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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