The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2026

Filed:

Oct. 25, 2024
Applicant:

Sigmastar Technology Ltd., Xiamen, CN;

Inventors:

Cheng Jie Zhu, Xiamen, CN;

Cheng Hung Tsai, Xiamen, CN;

Kuei Hung Cheng, Xiamen, CN;

Chia Ho Pan, Xiamen, CN;

Jian Na Shen, Xiamen, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/36 (2006.01); G11C 29/38 (2006.01);
U.S. Cl.
CPC ...
G11C 29/36 (2013.01); G11C 29/38 (2013.01); G11C 2029/3602 (2013.01);
Abstract

A memory testing method includes the operations of: generating test pattern data, a test address and reference data by a pattern generating circuit; performing a built-in self-test (BIST) according to the test pattern, the test address and the reference data by multiple memory modules to generate multiple test results; generating an indicator signal according to the multiple test results; when a first test result among the multiple test results indicates a fault, retaining the test address by the pattern generating circuit in response to the indicator signal, and testing, according to the test address and multiple sets of predetermined pattern data, a first memory module among the multiple memory modules that corresponds to the first test result to generate a localization test result; and determining a faulty memory cell in the first memory module according to the localization test result.


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