The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2026
Filed:
Aug. 23, 2024
Nvidia Corporation, Santa Clara, CA (US);
Polychronis Xekalakis, Portland, OR (US);
Samuel Charles Tsen, Jr., Portland, OR (US);
David Hass, Cupertino, CA (US);
Guillermo J. Rozas, Los Gatos, CA (US);
Yusuf Cagatay Tekmen, Raleigh, NC (US);
Nickolas Andrew Fortino, San Jose, CA (US);
Ross Segelken, Portland, OR (US);
Michael P. Cornaby, Hillsboro, OR (US);
Nikhita Kunati, San Ramon, CA (US);
Sean Benton Franey, Portland, OR (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
A first thread is executed in a first pipeline of a first core of an integrated circuit (IC). The first core includes a first set of hardware structures. In response to a command to operate the IC with multiple cores, the first pipeline is flushed. The first core is partitioned to obtain a second core and a third core. The first pipeline is partitioned to obtain a second pipeline and a third pipeline. The first set of hardware structures is partitioned to obtain a second set of hardware structures and a third set of hardware structures. The first thread is executed on the second pipeline of the second core of the IC, the second core including the second set of hardware structures. A second thread is executed on the third pipeline of the third core of the IC, the third core including the third set of hardware structures.