The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2026
Filed:
Apr. 20, 2022
Marvell Asia Pte Ltd, Singapore, SG;
David A. Carlson, Haslet, TX (US);
Marvell Asia Pte Ltd, Singapore, SG;
Abstract
A circuit and corresponding method perform floating-point (FP) addition. The circuit computes exponent differences between exponents of a plurality of FP inputs and generates a plurality of aligned FP addends by aligning the plurality of FP inputs based on the exponent differences computed. The aligned FP addends of the plurality of aligned FP addends are at a higher FP precision relative to a lower FP precision of the plurality of FP inputs. The circuit generates a higher precision FP sum at the higher FP precision by summing the plurality of aligned FP addends, simultaneously. The circuit transforms the higher precision FP sum, at the higher FP precision, into a lower precision FP sum, at the lower FP precision. The circuit outputs the lower precision FP sum produced with reduced latency relative to a conventional adder that successively sums addends.