The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2026
Filed:
Apr. 28, 2023
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
David Patten, Austin, TX (US);
Cirrus Logic Inc., Austin, TX (US);
Abstract
This application describes electronic circuit packages and methods of manufacture. The package () includes a primary integrated circuit die () with a smaller secondary integrated circuit die () attached to a first surface of the primary integrated circuit die in a first location. A first set of electrical connectors () extend from the first surface of the primary integrated circuit die outside the first location to a package connection layer () to provide electrical connection between the package connection layer and the primary integrated circuit die. An intermediate layer () of dielectric or insulating material extends between the primary integrated circuit die and the package connection layer so that the dielectric or insulating material surrounds the first set of electrical connectors and there is at least some dielectric or insulating material between the second integrated circuit die and the package connection layer.