Semiconductor integrated circuit device with first memory cell and third memory cell, and manufacturing method therefor

Abstract

A semiconductor integrated circuit device includes a resistive layer having a trench-like structure with an upward opening, a first electrode located on an outer side of the resistive layer, and a second electrode located on an inner side of the resistive layer; the first electrode and the second electrode are opposite to each other on two sides of a sidewall of the resistive layer; and the resistive layer, the first electrode and the second electrode form a first memory cell. A manufacturing method includes forming a first electrode on a substrate, the substrate including a first via connected with a first metal layer; etching a recess in the first electrode at a position staggered from the first via and forming a resistive layer in the recess; and forming a second electrode in the opening of the resistive layer to obtain a first memory cell.