The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

May. 16, 2024
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Quang Le, San Jose, CA (US);

Xiaoyong Liu, San Jose, CA (US);

Maki Maeda, Fujisawa, JP;

Hisashi Takano, Fujisawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 50/20 (2023.01); G01R 33/07 (2006.01); G11C 11/16 (2006.01); H10N 52/00 (2023.01);
U.S. Cl.
CPC ...
H10N 50/20 (2023.02); G01R 33/075 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); H10N 52/101 (2023.02);
Abstract

The present disclosure generally relates to a magnetic recording device comprising a current-in-plane (CIP) spin orbit torque (SOT) device. The SOT device comprises a topological material (TM) layer and one or more free layers. The TM layer may be recessed from the MFS, and may comprise BiSb or YPtBi. Current is configured to flow in-plane into the TM layer. In one embodiment, one or more free layers are disposed on a same surface of the TM layer. In another embodiment, one or more free layers are disposed on opposite surfaces of the TM layer. In embodiments, comprising two or more free layers, voltage outputs read from at least two of the two or more free layers are opposite, and the two free layers have opposite polarities. In another embodiment, the SOT device comprises four free layers arranged in a bridge configuration.


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