The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

May. 29, 2020
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Takanori Tanaka, Tokyo, JP;

Yuichi Nagahisa, Tokyo, JP;

Naoyuki Kawabata, Tokyo, JP;

Hiroyuki Amishiro, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/66 (2025.01); H02P 27/08 (2006.01); H10D 62/832 (2025.01);
U.S. Cl.
CPC ...
H10D 30/665 (2025.01); H10D 62/8325 (2025.01); H02P 27/08 (2013.01);
Abstract

Fluctuations in device characteristics are suppressed by suppressing local occurrences of a large current through a body diode of a field-effect transistor. A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate, a semiconductor layer formed on the upper surface of the silicon carbide semiconductor substrate, and a backside electrode formed on the lower surface of the silicon carbide semiconductor substrate. A region in which electric resistivity takes a first value is regarded as a first resistance region, and a region where the electric resistivity takes a second value greater than the first value is regarded as a second resistance region. The second resistance region extends across a region boundary, i.e., the boundary between the active region and the termination region, in plan view.


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