The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2026
Filed:
Aug. 31, 2023
Texas Instruments Incorporated, Dallas, TX (US);
Rajavelu Thinakaran, Bangalore, IN;
Gautam Nandi, Bangalore, IN;
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
The techniques and circuits, described herein, include solutions for reducing measure current settling time in source measurement units (SMUs) during a force voltage mode of operation. An SMU includes a force amplifier having a first voltage input, a second voltage input, a feedback voltage input, and a output. A resistor has a first terminal coupled to the output of the force amplifier, and a second terminal. A switch is coupled between the second terminal of the resistor and the feedback voltage input of the force amplifier. The switch is closed in the force voltage mode, creating a feedback path which the resistor is contained within. A series combination of a capacitor and a resistor is coupled to a gate of a transistor within the force amplifier, which results in improved measure current settling time compared to alternative techniques.