The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Jun. 08, 2022
Applicant:

Commissariat À L'énergie Atomique ET Aux Énergies Alternatives, Paris, FR;

Inventors:

Thierry Claret, Grenoble, FR;

Delphine Ferreira, Grenoble, FR;

Raphael Ramos, Grenoble, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/30 (2006.01); H01G 4/008 (2006.01); H10D 1/00 (2025.01); H10D 1/68 (2025.01); B82Y 30/00 (2011.01); B82Y 40/00 (2011.01);
U.S. Cl.
CPC ...
H01G 4/306 (2013.01); H01G 4/008 (2013.01); H10D 1/042 (2025.01); H10D 1/716 (2025.01); B82Y 30/00 (2013.01); B82Y 40/00 (2013.01);
Abstract

A method for manufacturing a capacitive device comprising the following steps: i) provide a substrate comprising: a first area made of a first material and/or having a first texture, a second area made of a second material and/or having a second texture, a third area made of a third material and/or having a third texture, ii) make nanopillars grow over the substrate with which a nanopillar layer is obtained locally having different densities, the density of the first area being lower than the density of the third area, iii) deposit an insulating layer, iv) deposit a conductive layer, with which a capacitive stack is formed at the first area, the capacitive stack comprising the insulating layer and the conductive layer.


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