The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Jul. 03, 2025
Applicant:

Xiamen Tianma Display Technology Co., Ltd., Xiamen, CN;

Inventors:

Xuehuan Feng, Xiamen, CN;

Yana Gao, Xiamen, CN;

Xingyao Zhou, Xiamen, CN;

Zhiqiang Xia, Xiamen, CN;

Kang Yang, Xiamen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/06 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0257 (2013.01); G09G 2330/08 (2013.01);
Abstract

A display panel and a display device are provided. The display panel includes shift register. The shift register includes shift register units. The shift register unit includes input circuit, output circuit and voltage stabilization circuit. The shift register unit also includes input terminal, first clock terminal, first auxiliary voltage terminal, first voltage terminal, second voltage terminal, third voltage terminal and output terminal. The input circuit is configured to control a signal of the first node and a signal of the second node. The voltage stabilization circuit is configured to control a transmission path between the first node and the third node. The output circuit is configured to control the output terminal to output a first output signal. During at least a part of a period when the signal of the third node is at an enable level, the first node and the third node are cut off from each other.


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