The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Jul. 08, 2024
Applicant:

Hewlett Packard Enterprise Development Lp, Spring, TX (US);

Inventors:

Diman Zad Tootaghaj, Milpitas, CA (US);

Yunming Xiao, Ypsilanti, MI (US);

Aditya Dhakal, Santa Clarita, CA (US);

Puneet Sharma, Palo Alto, CA (US);

Lianjie Cao, Milpitas, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/50 (2006.01); G06F 15/173 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5038 (2013.01); G06F 9/5016 (2013.01); G06F 15/17331 (2013.01);
Abstract

In some examples, an adapter is for use with a system including a plurality of physical processing units (PPUs). The adapter includes a network interface to communicate over a network an adapter controller to receive, over the network, job data for multiple jobs to be executed on PPU fractions of one or more physical PPUs, and determine that first job data of a first job of the multiple jobs is to be provided to a first PPU fraction of the PPU fractions, and that second job data of a second job of the multiple jobs is to be provided to a second PPU fraction of the PPU fractions. The adapter controller initiates a direct memory access (DMA) transfer of the first job data to a first PPU memory buffer of the first PPU fraction, and a DMA transfer of the second job data to a second PPU memory buffer of the second PPU fraction.


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