The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Dec. 04, 2023
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Erwei Wang, London, GB;

Jeffrey Fifield, Longmont, CO (US);

Philip James-Roxby, Longmont, CO (US);

Samuel R. Bayliss, Mountain View, CA (US);

Zachary Blair, San Jose, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01);
U.S. Cl.
CPC ...
G06F 8/452 (2013.01);
Abstract

A method includes a method includes receiving, by a compiler of a host of a computing system, input code, generating, by the compiler, pipelined input code by adding first tokens in a loop iteration argument field of a loop in the input code to pipeline the loop, the first tokens configured to sequentialize and serialize loop operations, a quantity of the first tokens based on a quantity of pipeline stages, and providing, by the host, the pipelined input code to a controller of an integrated circuit (IC) of the computing system.


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