The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2026
Filed:
Jan. 23, 2025
Sandisk Technologies, Inc., Milpitas, CA (US);
Eran Sharon, Rishon Lezion, IL;
Ariel Navon, Revava, IL;
Sandisk Technologies, Inc., Milpitas, CA (US);
Abstract
When data is stored in a multi-level memory, the bit error rate among the various pages in the memory may be unbalanced. Different read-sense timings can be applied to different logical pages to mitigate this problem. More specifically, the sense time used to read a page can be based on a number of read thresholds involved in reading the page. For example, in quad-level cells (QLCs) configured to store top, upper, middle, and lower pages of data, and the sensing times for the top, upper, middle, and lower pages can progressively increase. Dynamically adjusting a voltage stabilization period of a read voltage can significantly reduce read latency and power consumption, which may be desired, for example, when retrieving data at multiple read resolutions or when supporting page-by-page programming.