The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Mar. 18, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Dinesh Kumar Choudhary, Tonk, IN;

Srinivas Rao Lengamaneni, Hyderabad, IN;

Maulik Shah, Hyderabad, IN;

Nirav Narendra Desai, Hyderabad, IN;

Chandan Agarwalla, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/3237 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3237 (2013.01);
Abstract

A core circuit in a processor executes instructions in an operating mode and, when the core circuit is idle, transitions to a low-power mode to reduce power consumption. Low power modes include a clock-gated mode, in which a clock signal is blocked, and a power-collapse mode, in which a supply voltage is shut off. An exemplary core control circuit may transition the core circuit from the operating mode to the clock-gated mode to reduce power consumption and then transition the core circuit from the clock-gated mode to the power-collapse mode to further reduce power consumption. The core control circuit is also configured to transition the core circuit back to the operating mode. The core control circuit may transition the core circuit to the power-collapse mode in response to a signal from a timer circuit and transitions the core circuit back to the operating mode in response to an interrupt signal.


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