The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

May. 29, 2024
Applicant:

Nuvation Research Corporation, Sunnyvale, CA (US);

Inventors:

Manoj Mathew, Kitchener, CA;

Nathanael Dimitro Wennyk, Waterloo, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/389 (2019.01); G01R 31/367 (2019.01); G01R 31/3842 (2019.01);
U.S. Cl.
CPC ...
G01R 31/3842 (2019.01); G01R 31/367 (2019.01); G01R 31/389 (2019.01);
Abstract

A multi-stack battery management device is disclosed herein. In various embodiments, the multi-stack battery management device comprises an energy storage system comprising one or more stacks including, wherein the one or more connected stacks comprises one or more connected stacks and one or more disconnected stacks, wherein the connected stacks are connected to a shared DC bus, a measurement module comprising a voltage measurement device and a current measurement device, the voltage measurement device configured to measure a measured voltage associated with one of the one or more stacks and the current measurement device configured to measure a measured current associated with one of the one or more stacks; a stack estimation system for receiving the measured voltage and the measured current from the measurement module and for generating an estimated stack open circuit voltage and an estimated stack resistance for one or more of the stacks; and a multi-stack management module for receiving the estimated stack open circuit voltage and the estimated stack resistance and for determining an output signal based on the estimated stack open circuit voltage and the estimated stack resistance, wherein the output signal is used for determining whether to connect the one or more disconnected stacks to the shared DC bus.


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