The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2026
Filed:
Dec. 29, 2022
Denso Corporation, Kariya-city, JP;
Toyota Jidosha Kabushiki Kaisha, Toyota, JP;
Mirise Technologies Corporation, Nisshin, JP;
National University Corporation Tokai National Higher Education and Research System, Nagoya, JP;
Hamamatsu Photonics K.k., Hamamatsu, JP;
Shosuke Nakabayashi, Nisshin, JP;
Junji Ohara, Nisshin, JP;
Masatake Nagaya, Nisshin, JP;
Chiaki Sasaoka, Nagoya, JP;
Shoichi Onda, Nagoya, JP;
Jun Kojima, Nagoya, JP;
Daisuke Kawaguchi, Hamamatsu, JP;
Ryuji Sugiura, Hamamatsu, JP;
Toshiki Yui, Hamamatsu, JP;
Keisuke Hara, Hamamatsu, JP;
DENSO CORPORATION, Kariya-city, JP;
TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota, JP;
MIRISE Technologies Corporation, Nisshin, JP;
National University Corporation Tokai National Higher Education and Research System, Nagoya, JP;
HAMAMATSU PHOTONICS K.K., Hamamatsu, JP;
Abstract
A method of manufacturing a semiconductor element includes formation of a modified layer, detection of a first region, and cutting of a semiconductor wafer. In the formation of the modified layer, a laser is irradiated on the semiconductor wafer to form the modified layer extending along a surface of the semiconductor wafer inside the semiconductor wafer. The surface of the semiconductor wafer includes a peripheral portion having the first region and a second region. The first region is a region in which the modified layer is not located, and the second region is a region in which the modified layer is formed. In the cutting of the semiconductor wafer, the semiconductor wafer is cut at the modified layer starting from the second region.