The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Mar. 16, 2020
Applicant:

Nec Corporation, Tokyo, JP;

Inventors:

Tomohiro Yamaji, Tokyo, JP;

Tsuyoshi Yamamoto, Tokyo, JP;

Assignee:

NEC CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 60/01 (2023.01); H10N 60/12 (2023.01); H10N 60/80 (2023.01); H10N 69/00 (2023.01);
U.S. Cl.
CPC ...
H10N 60/0381 (2023.02); H10N 60/0912 (2023.02); H10N 60/12 (2023.02); H10N 60/805 (2023.02); H10N 69/00 (2023.02);
Abstract

A circuit manufacturing method according to the present disclosure is a circuit manufacturing method by deposition, comprising performing first deposition for forming a first superconductor layer, oxidizing a surface of the first superconductor layer to form an oxide film, performing second deposition for forming a second superconductor layer, whereby a circuit in which Josephson junctions are aligned is generated. A mask includes two opening parts and an odd number of first-type opening parts. The width of a first-type opening part has such a length that the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the first-type opening part becomes larger than the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the two opening parts that are adjacent to each other.


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