The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Nov. 12, 2020
Applicants:

Sony Group Corporation, Tokyo, JP;

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Masahiro Joei, Kanagawa, JP;

Kenichi Murata, Kanagawa, JP;

Fumihiko Koga, Kanagawa, JP;

Iwao Yagi, Kanagawa, JP;

Shintarou Hirata, Kanagawa, JP;

Hideaki Togashi, Kanagawa, JP;

Yosuke Saito, Tokyo, JP;

Nobutoshi Fujii, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10K 39/32 (2026.01); H01L 21/02 (2006.01); H01L 21/3205 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H04N 25/70 (2023.01); H10F 39/00 (2025.01); H10F 39/12 (2025.01); H10K 30/30 (2023.01); H10K 30/82 (2023.01); H10K 30/88 (2023.01); H10K 71/50 (2023.01); H10K 71/80 (2023.01); H10P 14/40 (2026.01); H10P 95/00 (2026.01); H10W 20/00 (2026.01); H10W 20/40 (2026.01);
U.S. Cl.
CPC ...
H10K 39/32 (2023.02); H04N 25/70 (2023.01); H10F 39/018 (2025.01); H10F 39/12 (2025.01); H10F 39/804 (2025.01); H10F 39/805 (2025.01); H10F 39/811 (2025.01); H10K 30/82 (2023.02); H10K 30/88 (2023.02); H10K 71/50 (2023.02); H10K 71/80 (2023.02); H10P 14/40 (2026.01); H10P 95/00 (2026.01); H10W 20/01 (2026.01); H10W 20/40 (2026.01); H10K 30/30 (2023.02);
Abstract

A solid-state imaging device according to an embodiment of the present disclosure includes: a plurality of photoelectric converters that is stacked on a semiconductor substrate, and has wavelength selectivities different from each other; and a wiring line that is formed on the semiconductor substrate, and is electrically coupled to the plurality of photoelectric converters. Each of the photoelectric converters includes a photoelectric conversion film, and a first electrode and a second electrode that are disposed with the photoelectric conversion film interposed therebetween. The wiring line extends in a direction normal to the semiconductor substrate, and includes a vertical wiring line formed in contact with the second electrode of each of the photoelectric converters.


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