The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2026
Filed:
Oct. 24, 2023
Applied Materials, Inc., Santa Clara, CA (US);
Sai Hooi Yeong, Cupertino, CA (US);
Liu Jiang, Dublin, CA (US);
Susmit Singha Roy, Campbell, CA (US);
Abhijit Basu Mallick, Sunnyvale, CA (US);
El Mehdi Bazizi, San Jose, CA (US);
Benjamin Colombeau, San Jose, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
Semiconductor devices (e.g., gate-all-around (GAA) devices), process tools for manufacturing GAA devices and methods of manufacturing GAA devices and multilayer inner spacers for GAA devices are described. The multilayer inner spacer comprises an inner layer, a middle layer, and an outer layer within a superlattice structure formed on a top surface of a substrate. The superlattice structure has a plurality of semiconductor material layers (e.g., silicon germanium (SiGe)) and a corresponding plurality of channel layers (e.g., silicon (Si)) alternatingly arranged in a plurality of stacked pairs. In some embodiments, the methods are performed in situ in an integrated deposition and etch processing system.