The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Dec. 20, 2023
Applicant:

Cisco Technology Inc., San Jose, CA (US);

Inventors:

Manik Singhal, Bengaluru, IN;

Parthibhan Paramaguru, Bengaluru, IN;

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 56/00 (2009.01);
U.S. Cl.
CPC ...
H04W 56/0035 (2013.01);
Abstract

An apparatus configured to perform clock quality measurements and monitoring operations in one or more communication networks may comprise a memory and a processor communicatively coupled to one another. The processor may be configured to receive a first clock and a second clock from a network device, obtain multiple thresholds associated with the network device, obtain multiple error detection configuration commands, select a threshold of the multiple thresholds, select an error detection configuration command, and evaluate the first clock based at least in part upon the threshold and the error detection configuration command. Further, the processor may be configured to generate a result indicating whether the first clock comprises a clock error greater than the threshold and record the threshold and the error detection configuration command against an input reference of the clock in response to generating the result indicating that the clock comprises the clock error greater than the threshold.


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