The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2026
Filed:
Jun. 03, 2023
Mammen Thomas, Seattle, WA (US);
Mammen Thomas, Seattle, WA (US);
Abstract
PCI Express (PCIE) is an IO interconnect standard that is implemented as a tree network with a root complex connecting to a CPU as the root node for use inside the computer for connecting to peripheral devices. Currently PCIE has achieved stability such that PCIE can be used as a basis for other applications. A PCIE based scheme inter-connecting multiple PCIE enabled computer systems each having at least one PCIE root complex controlling at least a PCIE bus, enabling the scalability of PCIE architecture to be applied for data transport between the connected system cluster is proposed. The interconnection uses an outbound port enabled for system interconnection on the PCIE bus of each PCIE enabled computer connecting to one inbound port on an independently programmable network switch having a plurality of inbound ports. The interconnection is using PCIE protocol for data transfer within the cluster.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile