The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2026
Filed:
Mar. 28, 2023
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Ramkumar Jayaraman, Bangalore, IN;
Robert Blankenship, Tacoma, WA (US);
Yojan Chitkara, Bangalore, IN;
Rahul Pal, Bangalore, IN;
Assignee:
Altera Corporation, San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 12/084 (2016.01);
U.S. Cl.
CPC ...
G06F 13/1668 (2013.01); G06F 12/084 (2013.01); G06F 2212/603 (2013.01);
Abstract
Techniques to shared system memory across nodes in a system. Circuitry is arranged to provide a mechanism to share a memory region of a memory maintained at a first host CPU at a first node across multiple other host CPUs at multiple other nodes using various links and protocols described in one or more revisions of the Compute Express Link (CXL) specification.