The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

Aug. 13, 2021
Applicant:

Massachusetts Institute of Technology, Cambridge, MA (US);

Inventors:

Dane William De Quilettes, Somerville, MA (US);

Brandon T. Motes, Rowlett, TX (US);

Anthony T. Troupe, Cambridge, MA (US);

Vladimir Bulovic, Lexington, MA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10P 74/00 (2026.01); G01N 21/95 (2006.01); H10P 74/20 (2026.01);
U.S. Cl.
CPC ...
H10P 74/238 (2026.01); G01N 21/9501 (2013.01); G01N 2201/06113 (2013.01);
Abstract

An example methodology implementing the disclosed techniques includes receiving a plurality of measured semiconductor properties of one or more partially completed semiconductor devices, determining a measure of short circuit current density (J) of each of the one or more partially completed semiconductor devices, the J, measure based on a measure of semiconductor diffusion length (L) and a measure of thickness, and determining a current voltage relationship of each of the one or more partially completed semiconductor devices. The method also includes calculating a current voltage (JV) curve based on the J, measure and the current voltage relationship of each of the one or more partially completed semiconductor devices, wherein the JV curve provides an indication of maximum achievable power point (P) and open circuit voltage (V) of a semiconductor device completed from the one or more partially completed semiconductor devices, and determining a predicted performance characteristic of the semiconductor device.


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