The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

Mar. 26, 2021
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Akira Matsumoto, Kanagawa, JP;

Koichiro Zaitsu, Kanagawa, JP;

Keiji Nishida, Kanagawa, JP;

Mizuki Nishida, Kanagawa, JP;

Kazutaka Izukashi, Kanagawa, JP;

Daisuke Ito, Kanagawa, JP;

Yasufumi Miyoshi, Kanagawa, JP;

Junpei Yamamoto, Kanagawa, JP;

Yusuke Tanaka, Kanagawa, JP;

Yasushi Hamamoto, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10F 39/00 (2025.01); H04N 25/704 (2023.01);
U.S. Cl.
CPC ...
H10F 39/807 (2025.01); H10F 39/8063 (2025.01); H04N 25/704 (2023.01);
Abstract

An imaging device includes a plurality of imaging elements, wherein each of the plurality of imaging elements includes: a plurality of pixels containing impurities of a first conductivity type; an element separation wall surrounding the plurality of pixels and provided so as to penetrate a semiconductor substrate; an on-chip lens provided above a light receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; and a first separation portion provided in a region surrounded by the element separation wall and separating the plurality of pixels, the first separation portion is provided so as to extend in a thickness direction of the semiconductor substrate, and a first diffusion region containing impurities of a second conductivity type opposite to the first conductivity type is provided in a region positioned around the first separation portion and extending in the thickness direction of the semiconductor substrate.


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