The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2026
Filed:
Oct. 06, 2023
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/00 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10W 46/00 (2026.01);
U.S. Cl.
CPC ...
H10D 30/024 (2025.01); G03F 7/70033 (2013.01); G03F 7/70633 (2013.01); H10D 30/6735 (2025.01); H10D 62/118 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01); H10W 46/00 (2026.01);
Abstract
An integrated circuit includes a device region and an overlay mark region. The device region includes a plurality of stacked channels of a transistor, a source/drain region of the transistor, a source/drain contact of a first material on the source/drain region, and a conductive via of a second material in contact with the source/drain contact. The overlay mark region includes a first diffraction grating of first metal structures of the first material and a second diffraction grating of second metal structures above of the second material above and offset from the first metal structures.