The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

Nov. 25, 2024
Applicant:

GM Global Technology Operations Llc, Detroit, MI (US);

Inventors:

Yilun Luo, Ann Arbor, MI (US);

Khorshed Mohammed Alam, Canton, MI (US);

Chandra S. Namuduri, Troy, MI (US);

Benjamin S. Ngu, Rochester Hills, MI (US);

Rashmi Prasad, Troy, MI (US);

Michael Z. Pieszala, Panama City, FL (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/53862 (2007.01); H02M 7/00 (2006.01); H02M 7/53846 (2007.01);
U.S. Cl.
CPC ...
H02M 7/53862 (2013.01); H02M 7/003 (2013.01); H02M 7/538466 (2013.01);
Abstract

A multi-phase power inverter including a plurality of X-type multilevel power converters arranged to transfer electric power between a high-voltage direct current (DC) power supply and an electric machine. Each of the plurality of X-type multilevel power converters is configured as a solid-state integrated circuit (IC) including a plurality of semiconductor switches and clamping diodes. The plurality of semiconductor switches, a positive DC power bus, a negative DC power bus, a first AC bus, a second AC bus, a third AC bus, a fourth AC bus, and the clamping diodes are arranged into a plurality of tiers. Such that both the positive DC power bus and the negative DC power bus are parallel with the auxiliary or neutral bus generating mutual inductance cancellation that minimizes parasitic inductance by coupling positive mutual inductance and negative mutual inductance for commutation loop currents within each of the X-type multilevel converters.


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