Reconfigurable prediction engine for general processor counting

Abstract

Systems, methods, and devices for determining a derived counter value based on a hardware performance counter. Example devices include input circuitry configured to input a hardware performance counter value; counter engine circuitry configured to determine the derived counter value by applying a model to the hardware performance counter value; and output circuitry configured to communicate the derived counter value to a consumer. In some examples, the consumer includes an operating system scheduler, a memory controller, a power manager, or a data prefetcher, or a cache controller. In some examples, the processor includes circuitry configured to dynamically change the model during operation of the processor. In some examples, the model includes or is generated by an artificial neural network (ANN).