Low-latency time-encoded spiking neural network

Abstract

A method of executing a time-encoded spiking neural network (tSNN) that includes configuring an electronic circuit connecting pairs of neurons of the tSNN, wherein each pair of the pairs of neurons connects a sender neuron to a receiver neuron through parallel channels, and operating the electronic circuit at an actual clock rate corresponding to actual time steps, for the electronic circuit to perform signaling over said each pair at each time step of the actual time steps by sending signals in parallel across the parallel channels. Sent signals encode subcycle timing information about a timing of spikes relative to subcycle time steps, a unit duration that corresponds to a duration of said each time step divided by a latency reduction factor (LRF), for the operated electronic circuit to emulate an execution of the tSNN at an effective clock rate corresponding to the actual clock rate multiplied by the LRF.